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The aim of this work is to demonstrate high breakdown voltage and low buffer trapping in superlattice GaN-on-Silicon heterostructures for high voltage applications. To this aim, we compared two structures, one based on a step-graded (SG) buffer (reference structure), and another based on a superlattice (SL). In particular, we show that (i) the use of an SL allows us to push the vertical breakdown voltage above 1500 V on a 5 µm stack, with a simultaneous decrease in vertical leakage current, as compared to the reference GaN-based epi-st
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